Efficient parallel implementation of QRUOV post-quantum signature scheme on a GPU

Chai, Yau Yuen (2026) Efficient parallel implementation of QRUOV post-quantum signature scheme on a GPU. Final Year Project, UTAR.

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Abstract

The rapid advancement of quantum computing threatens the mathematical foundations of classical cryptographic systems, accelerating the urgent need for Post-Quantum Cryptography (PQC). The Quotient Ring Unbalanced Oil and Vinegar (QR-UOV) signature scheme offers robust quantum resistance and compact signature sizes, making it an excellent candidate for secure digital communications. However, its heavy reliance on dense matrix operations and multivariate polynomial evaluations introduces severe computational bottlenecks when executed on traditional CPU architectures. To address this, this project presents a highly optimised, massively parallel implementation of the QR-UOV signature scheme utilising the NVIDIA CUDA framework on a Graphics Processing Unit (GPU). To overcome the sequential limitations of the CPU, the workload was redesigned using coarse-grained batching, allowing thousands of independent signatures to be processed concurrently. Furthermore, to resolve severe global memory bandwidth bottlenecks, the architecture introduced Kernel Fusion and Shared Memory Tiling, ensuring that intermediate finite-field operations bypassed high-latency memory transactions. A dynamic Hybrid CPU-GPU Fallback controller was also engineered to resolve rank-deficient matrices on the host, thereby guaranteeing strict cryptographic correctness without inducing warp divergence on the device. The system was extensively benchmarked across exponentially increasing workloads. The optimised fused GPU implementation achieved a peak throughput of 205,189 signatures per second and 320,082 verifications per second, delivering a remarkable 242-fold speedup over the baseline CPU implementation. An alternative hardware-accelerated variant utilising Tensor Cores (WMMA) was also evaluated, providing valuable architectural insights into the latency trade-offs of mapping integer-based cryptography onto half-precision floating-point hardware. Lastly, this project proves that optimised heterogeneous computing is a strict prerequisite for deploying PQC schemes in high-volume and real-time environments such as cloud servers and IoT gateways.

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