Power management scheme for FPGA based customizable internet of thing (IOT) sensor nodes

Tan, Beng Liong (2022) Power management scheme for FPGA based customizable internet of thing (IOT) sensor nodes. Master dissertation/thesis, UTAR.

Preview

PDF Download (2278Kb) | Preview

Abstract

Field-programmable gate array (FPGA)-based sensor nodes are popular for their flexible design approach and field re-configurability. RISC32, one of the recent Internet of things (IoT) processors proposed for developing FPGAbased sensor nodes, has the ability to reconfigure the microarchitecture dynamically according to program workload. This helps in reducing the dynamic energy consumption required for completing program execution. However, such an approach does not minimize the static energy consumption, which is important in FPGA-based systems. In this study, two known lowpower techniques compatible with FGPA were implemented in RISC32: clock gating (CG) and dynamic voltage–frequency scaling (DVFS) techniques. In addition, a software tool (Energy Reduction Program Analyzer) was developed to estimate the parameters that can configure the sensor node to achieve minimum energy consumption, targeting the typical IoT application scenario. Experimental results show that the low-power techniques applied in this work can reduce the energy consumption by 47% compared to the original RISC32. In particular, combining low-power techniques has shown improved iii energy saving compared to single low-power technique: 45% improvement versus CG, 11.54% improvement versus DVFS, and 40% improvement versus partial reconfiguration.

Actions (login required)