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Low-power RF design: Selective power-gated address decoder

Chiang, Chia Yeong (2014) Low-power RF design: Selective power-gated address decoder. Final Year Project, UTAR.

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    Item Type: Final Year Project / Dissertation / Thesis (Final Year Project)
    Subjects: T Technology > T Technology (General)
    Divisions: Faculty of Information and Communication Technology > Bachelor of Information Technology (Honours) Computer Engineering
    Depositing User: ML Main Library
    Date Deposited: 02 Jul 2014 07:16
    Last Modified: 02 Jul 2014 07:16
    URI: http://eprints.utar.edu.my/id/eprint/1184

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